| 摘要 |
The circuit applies to multi-layer chip on chip devices in which pretesting of component chips presents problems of providing large area contacts for test probes, and clamping gate inputs. Two chips (100,200) contain functional circuits (103, 203 etc.) and auxiliary switching circuits (S1,S2) selecting a test or a normal condition under control of control inputs (C1,C2). In the test condition with control inputs high, the inputs and outputs of each functional circuit are looped togeter while in the normal condition, inputs and outputs are routed to their corresponding connections on the partner chip. |
