| 摘要 |
PURPOSE:To short-circuit an access time and to reduce power consumption, by turning off a pair of load transistors at the same time when a pair of gate circuits are turned off. CONSTITUTION:In accessing a memory cell MC, information L on a bit line BL is read out. Since the level of the bit line BL goes to L, a load transistor Q1 is turned off via a level converter LC1 and this off-state is kept. A pair of gate circuits G1 and G2 are provided to interrupt the connection to a power supply (VCC) regardless of turning on or off of the load transistor Q1 for a specified period (t). Then, the memory cell MC can introduce the bit line BL to L level instantly without discharging unnecessary current (said steady-state current). |
