| 摘要 |
PURPOSE:To delay plural channels by dividing a memory in response to the number of input channels and adjusting the timing reading the divided memories. CONSTITUTION:An analog input signal of 4 channels is converted respectively by A/D converters 9-12 into a digital signal, extracted sequentially by a multiplexer 13 and stored in a memory area corresponding to the channel of a memory 15. The memory 15 is used as a delay means by giving a prescribed time of delay to the reading time of the memory 15 from the time written in the address of the memory 15, the delay time is set at each output channel and the memory 15 is read, the output is distributed into channels CH1-CH8 by a demultiplexer 16, converted into the analog signal by D/A converters 17-24 and outputted to output terminals 25-32. |
