发明名称 SYSTEM OF SETTING OPERATION MODE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To set a specific operation mode from a plurality of operation modes by providing one shift register which has been connected from one operation- mode setting terminal. CONSTITUTION:A shift register 4 which uses a mode-setting terminal 1 of a semiconductor integrated circuit as a data input is constituted in such a way that a data is shifted by a signal, of a shift clock signal line, generated at an AND circuit 6 by individual input signals to a clock input terminal 2 and to a reset input terminal 3. An input data 1' for operation-mode setting use is input from the mode-setting terminal 1 in synchronization with the signal of the shift clock signal line 7. A shift clock 7' is generated as an output signal from the AND circuit 6 by a clock 2' and a reset signal 3' which is input from the reset terminal 3. The clock 2' is a system clock which operates a semiconductor integrated circuit and is always oscillated. A data from individual flip- flops 8 constituting the shift register 4 is output from an output terminal 5; an operation mode is judged at the inside of the semiconductor integrated circuit when a reset is released.</p>
申请公布号 JPH02181950(A) 申请公布日期 1990.07.16
申请号 JP19890002412 申请日期 1989.01.09
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OGISU MIKIO
分类号 G06F1/24;G06F15/78;H01L21/82;H01L21/822;H01L27/04 主分类号 G06F1/24
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