发明名称 CHECKING DEVICE FOR PLL PHASE COMPARING WAVEFORM
摘要 PURPOSE:To check values in a short time on a real time basis by converting a counted value corresponding to the length of a phase comparing pulse DELTAphiinto an analog signal G, and respectively holding its maximum value and minimum value. CONSTITUTION:The device is the checking device to measure the minimum length and maximum length of the phase comparing pulse DELTAphi outputted from a PLL phase comparing circuit, and a reference oscillator 15, a counting circuit 16, which counts an output pulse Fc of the reference oscillator 15 with the phase comparing pulse DELTAphi as a gate, and a digital/analog converter 18, which converts the counted value of the counting circuit 16 into the analog signal G, are provided. Further a maximum value holding circuit 19 and a minimum value holding circuit 20, which respectively hold the maximum and minimum values of the analog signal G, and a display means 25, which simultaneously displays the held maximum and minimum values, are provided. Thus the minimum length and maximum length of the phase comparing pulse can be promptly and quantitatively measured.
申请公布号 JPH02179966(A) 申请公布日期 1990.07.12
申请号 JP19880331491 申请日期 1988.12.29
申请人 SONY CORP 发明人 KAZUNO SATORU
分类号 H02P29/00;G11B19/247;G11B19/28;H02P5/00 主分类号 H02P29/00
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