| 摘要 |
PURPOSE:To generate a parity input signal corresponding to input data on a semiconductor memory side by providing a parity generator, which self- generates the diagnosing parity check bit signal of a parity checker with the use of the input data. CONSTITUTION:A parity generator 6, which self-generates the diagnosing parity check bit signal PB of a parity checker 3 with the use of an input data ADD is provided. That is, since a parity checker 5 provides the parity generator 6, it self-generates a parity input signal PI (PB) corresponding to the address data ADD inputted from a tester, and even when the address data ADD are changed at random in the test mode of the parity checker 3, the correct test is attained. Thus the labor of a device test, and the increase of costs can be suppressed. |
