| 摘要 |
<p>An information processing system includes a first data processing device (10) and a second data processing device (12) each of which is capable if independent instruction execution during instruction cycles having a period which is a multiple of a periodic unit clock signal period. The devices are disclosed to be an arithmetic unit and a central processor coupled together by an interface (14). Each of the data processing devices (10, 12) include a clock generation device (180) having an input coupled to the unit clock signal for generating an associated instruction cycle clock signal which has a period which is a multiple of the unit clock signal period. The clock generation device (180) is further operable for suspending the generation of a next instruction cycle clock signal and for beginning the next instruction cycle clock signal in synchronism with a transition of the unit clock signal. The devices (10, 12) each request synchronization of their respective clocks which are then automatically synchronized to the other devices clock during a transition of the unit clock, allowing for instructions and operands to be synchronously passed between the central processor to the arithmetic unit.</p> |
