发明名称 Stepwise adjusted digital to analog converter having self correction
摘要 A highly accurate, inexpensive digital to analog converter requiring minimal accuracy in component values. A digital word is received serially, the least significant bit first. A voltage is stored on a capacitor at each bit, the value of the voltage being halfway between a reference voltage and the previously stored voltage, the reference voltage value depending on whether the bit is a logic "1" or "0". In each case, the halfway point of the voltage difference is determined by coupling to the midpoint of a pair of resistive components having essentially the same value. The value of the stored voltage represents the analog value of the digital word. The process is preferably repeated for the same word and the two resulting final voltages is averaged to eliminate any effect of a slight difference in component values in a pair.
申请公布号 US4940978(A) 申请公布日期 1990.07.10
申请号 US19880197737 申请日期 1988.05.23
申请人 ZENITH ELECTRONICS CORPORATION 发明人 MYCYNEK, VICTOR G.
分类号 H03M1/06;H03M1/66 主分类号 H03M1/06
代理机构 代理人
主权项
地址