发明名称 DIGITAL TRANSMISSION SYSTEM
摘要 PURPOSE:To simplify a short range transmitter and to facilitate the extraction of a clock signal by constituting a transmission line code such that the violation of the code rule is utilized to demultiplex and insert a special signal and a correction signal or the like separately and a clock component can be extracted with a simple logic processing. CONSTITUTION:In the case of a 1B4B code, an original signal (a) is subjected to 1B4B coding to obtain a waveform (b). According to the coding rule, an original signal 1-bit being 'x' is coded as '10x0'. However, in a time slot shown by an arrow, violation is used to apply coding of 11x0. The waveform (b) is retarded by one time slot of te original signal to obtain a waveform (c), both waveforms are ANDed to obtain a pulse train. A waveform (f) is obtained by ORing the pulse train (d) and a train resulting from retarding the train (d) by 1/2 time slot of the original signal. While the waveform is used as a clock as it is, the waveform is applied to an optical PLL or the like, the clock is stably extracted. When a clock waveform resulting from retarding the waveform (f) by 1/4 time slot of the original signal is ANDed with the waveform (b), a frame pulse (g) due to the violation is detected.
申请公布号 JPH02177739(A) 申请公布日期 1990.07.10
申请号 JP19880331378 申请日期 1988.12.28
申请人 HITACHI LTD 发明人 TAKASAKI YOSHITAKA
分类号 H04L25/49 主分类号 H04L25/49
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