| 摘要 |
PURPOSE:To reduce the area occupied on a semiconductor substrate and to reduce the check time while decreasing the number of components by incorporating a circuit generating a check data including an error. CONSTITUTION:When k-set of data Io - Ik are inputted to a buffer 1, the data are written in a main bit 6 of a memory cell 4 by a write circuit 3. On the other hand, a check bit generating circuit 2 based on the data Io - Ik generates j-set of check data C1 - Cj and the circuit 3 is used to write the data to a check bit 5 in the memory cell. In the readout mode, the stored data is checked by an error detection circuit 6 via a sense amplifier 7 and if a prescribed number l data or below are in error, a correction circuit 9 corrects the data and outputs the corrected k-set of data from a buffer 12. When a control signal 10 is supplied in the check mode, an error data generating circuit 11 generates data including an erroneous bits below l sets to check the functions of the circuits 8, 9. |
