发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To decrease the difference in the sensing rate between sense amplifiers without enlarging the chip size by a method wherein sense amplifiers are driven by power supplying and GND wiring through the intermediary of multiple drivers while driving wirings are arranged on cell arrays. CONSTITUTION:The P channel transistor side terminals of sense amplifiers S1-Sn connected to one another are further connected to multiple P channel drivers P1-Px through the intermediary of wirings L1-Lk passing through memory cells (b). Likewise, the N channel transistor side terminals are connected to multiple N channel drivers N1-Nk. When a signal in a cell is given to a bit wire, sense signals phiSE and phiSE are displayed respectively at high and low levels so as to actuate respective drivers. At this time, the amplifiers S1-Sn are supplied with current through the wirings L1-Lk and M1-Mk so that the terminal potentials of the same amplifiers S1-Sn may be equalized by shortening the intervals between wirings. Through these procedures, the sensing rate can be equalized to make the optimum setting up of the sense amplifiers feasible.
申请公布号 JPH02177360(A) 申请公布日期 1990.07.10
申请号 JP19880331708 申请日期 1988.12.27
申请人 NEC CORP 发明人 NODA KENJI
分类号 G11C11/41;G11C11/401;G11C11/409;H01L21/8242;H01L27/10;H01L27/108 主分类号 G11C11/41
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