发明名称 Switchable serial addition-subtraction circuit for BCD-8421-coded decimal numbers
摘要 The serial addition-subtraction circuit according to the subject of the invention has a dual full adder-subtractor (1), which can be switched from addition to subtraction and vice versa, and a two-value correction circuit (5), using which the number 6 (LHHL) or the number 10 (HLHL) can optionally be added to the intermediate result number which is stored in the shift register (3). In the case of addition, if the sum of the two BCD-8421-coded decimal digits is greater than the number 9 (HLLH), the number 6 (LHHL) is added in circuit (5) to the intermediate result number which is stored in the shift register (3). In the case of subtraction, if the number 0 (LLLL) is underpassed, the number 10 (HLHL) is added to the intermediate result number which is stored in the shift register (3), and thus the same is achieved as by subtracting the number 6. The adder circuit (5) consists of five dual half adders (24 to 28). <IMAGE>
申请公布号 DE3844384(A1) 申请公布日期 1990.07.05
申请号 DE19883844384 申请日期 1988.12.30
申请人 MERKLE, PAUL, 7032 SINDELFINGEN, DE 发明人 MERKLE, PAUL, 7032 SINDELFINGEN, DE
分类号 G06F7/495;G06F7/50 主分类号 G06F7/495
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