Circuit arrangement for dissipating DC supply voltages

摘要

In a circuit arrangement for dissipating DC supply voltages (at 9, 19, 20, 36, 101, 114, 118, 119) in a circuit (3) integrated on a semiconductor body from an external supply voltage (at 1), there is a requirement for good interference suppression at low supplied voltage and with little expenditure (complexity). This is achieved by means of a reference-voltage source (4) which is fed with the supplied voltage (at 1) to deliver a stabilised reference voltage (at 6), at least one sequential arrangement of at least two stabilisation stages (5, 13; 5, 14, 15 or 16; 100, 102; 111, 112 or 113), which each output at least one of the DC supply voltages (at 9, 19, 20, 36, 101, 114, 118, 119), enerby being suppliable to a first stabilisation stage (5, 100 or 111) of each series arrangement by means of the supplied voltage (at 1), and the reference voltage being suppliable (from 6) to said stabilisation stage to regulate its output DC supply voltage(s) (at 9, 101 or 114), and the following stabilisation stages (13 to 16, 102, 112, 113) of the series arrangement receiving energy from a DC supply voltage from a stabilisation stage arranged upstream in the series arrangement and their output DC supply voltage(s) (at 19, 20, 36, 118 or 119) being regulated by a DC supply voltage of the stabilisation stages arranged upstream or the reference voltage (from 6). <IMAGE>