发明名称 |
Circuit arrangement for detecting markings |
摘要 |
The circuit arrangement according to the main patent... (Patent Application P 3740017.7-53) is intended to be improved to the effect that a shorter signal response time of the evaluation circuit is achieved. Further, the possibility of light/dark detection of marks is intended to be provided. The useful signal is fed to a circuit which contains an amplifier (29) having reverse-connected parallel rectifier elements (30, 31) connected to its output, for splitting the useful signal present in the form of an alternating voltage into positive and negative half-cycles. Furthermore, the circuit has an inverting amplifier (36), and the two positive half-cycles can respectively be connected to a sample-and-hold circuit (38, 39) and have their voltage value doubled in a summing amplifier (40) connected to the output of the two sample-and-hold circuits. <IMAGE>
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申请公布号 |
DE3844198(A1) |
申请公布日期 |
1990.07.05 |
申请号 |
DE19883844198 |
申请日期 |
1988.12.29 |
申请人 |
BIELOMATIK LEUZE GMBH + CO, 7442 NEUFFEN, DE |
发明人 |
STEPHAN, WALTER, 7440 NUERTINGEN, DE |
分类号 |
B41F33/00;G06K7/10 |
主分类号 |
B41F33/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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