| 摘要 |
<p>PURPOSE:To prevent the influence of a code error or the like on the system by supplying the detection output of a phase comparator to a voltage controlled oscillating circuit and synchronizing the output clock of the voltage controlled oscillating circuit with an external selection input clock. CONSTITUTION:Phase difference absorbing circuits (20-1)-(20-n) provided corresponding to each of external input clocks (1-1)-(1-n) use an output clock 7 whose frequency is nf as a common reference clock to synchronize all phases of phase synchronizing clocks (4-1)-(4-n) to a clock selection circuit 30. Thus, even if an external input clock with different phase exists in the external input clocks (1-1)-(1-n), no frequency jump is caused in the output clock 7 to switch the selected external input clock 5. Thus, the fluctuation of the phase difference detected by the phase comparator 40 and the frequency jump of the output clock 7 are not caused and the influence of the code error or the like on the system is prevented.</p> |
