| 摘要 |
<p>This system is applicable to channels that use packet, frame or message protocols, for which a half-duplex communications controller (1) is connected to a multiplexer (2) which, in turn, is connected to two different clock circuits (3, 4), to provide the controller with a working frequency in the reception mode and another working frequency in the transmission mode. The system includes a buffer memory (11) in which the data to be transmitted are stored at a rate much higher than that at which they are transmitted to the line, these data being transferred to a serializer (15) which delivers the data to the line (8) through a transmission interface (16) at the line transmission rate. The system is normally in the reception mode and changes from this state when the transmission operation is desired, after having verified that no reception is taking place.</p> |
