| 摘要 |
PURPOSE:To balance decision margins and to reduce costs in an F2F system by generating clocks at the time when 5/8 the cycle time of the already read adjacent bits elapses since the time for starting reading. CONSTITUTION:An F2F frequency modulating signal passes through a control circuit 102, and time counting is carried out in a counter circuit 103. The circuit 102 controls the circuit 103 and a comparator 106. In accordance with the data, the data are operated in an arithmetic circuit 104 and is held in a register 105. The next bits are counted, and the comparator 106 compares the same with the data of the register 105, and when both of them coincide, the comparator outputs the data and clock pulses. The circuit 104 is so constituted as to obtain the value of 5/8 the digital value from the circuit 103. In the comparator 106, the data is compared with the count data of the next bits and at the point of the time when the count values attains 1/5 the count value before the previous one, decision is made and the data and the clock pulses are outputted. |
