发明名称 Trench interconnect for CMOS diffusion regions
摘要 A sub-surface interconnection structure for coupling an n-type diffusion to a p-type diffusion. The structure is a conductor-filled trench disposed between the diffusion regions. The trench has a thin dielectric layer on its sidewalls and bottom. The conductor within the trench contacts the diffusion regions. Parasitic device formation between the diffusion regions is suppressed because the trench provides a parasitic gate that is shorted to the parasitic source regions (i.e., the coupled diffusion regions). Moreover, the trench provides an enlarged contact to the coupled diffusion regions for the subsequently-applied metal layer.
申请公布号 US4939567(A) 申请公布日期 1990.07.03
申请号 US19890303986 申请日期 1989.01.30
申请人 IBM CORPORATION 发明人 KENNEY, DONALD M.
分类号 H01L23/522;H01L23/528;H01L27/092;H01L27/11 主分类号 H01L23/522
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