| 摘要 |
<p>A method and apparatus are disclosed for the handling of high speed data. In one mode of operation, the data is routed to a plurality of memory arrays (12, 14, 16, 18). In order to provide for the handling of a continuous stream of data at a high rate of speed, memory arrays (12, 14, 16, 18) are arranged in two banks (A, B). Within each bank (A, B) are groups (20, 22) of memory arrays connected in series. A control circuit (30) is provided to direct even data to one group (20, 22) of memory arrays within a bank (A, B) and odd data to another group (20, 22) within that bank (A, B), and to switch the data stream between banks (A, B) such that there is no interruption in the acquisition of data.</p> |
