| 摘要 |
<p>A processor array comprises a number of processing elements (PE). Eeach processing element (PE) includes nearest neighbour inputs (NN) arranged to receive data from adjacent processing elements (PE) in the array. Each processing element (PE) has a memory output (MO) for communicating data from the processing element (PE) to associated store. Memory pins (P1P2) are connected to the memory outputs (MO). The memory pins (P1P2) are also connected to the nearest neighbour inputs (NN) of their respective processing elements and also provide a data path to the nearest neighbour inputs (NN) of neighbouring processing elements. The processing elements transfer data to store and shift data to neighbouring processing elements (PE) in separate, non-overlapping operations.</p> |
