摘要 |
<p>An electrically erasable and programmable read only memory includes a memory cell array (100) including a plurality of memory cells (11-1n, 21-2n) coupled to bit lines (BL1-BLn) and word lines (WL1-WL3). Each of the memory cells includes a select transistor (15-18), a memory transistor (11-14) having a control gate (5), and a drive transistor (31-33) of the enhancement type applying a control gate voltage (VCG, PL) to the control gate of the memory transistor. The read only memory further includes select means (41, 42, 46) for selecting at least one of the bit lines and one of the word lines. When the select means selects one (WL1) of the word lines at the time of reading out data stored in the memory cells (11-1n) coupled to the selected word line, the drive transistor (31) relating to the selected word line is turned ON so that the control gate voltage (VCG, PL) is applied to the control gates of the memory transistors through the turned-ON drive transistor and thereby drives the corresponding memory transistors.</p> |