发明名称 CMOS comparator bias voltage generator.
摘要 An apparatus for generating a CMOS comparator bias voltage for a CMOS comparator includes a dummy comparator having a negative input and a positive input coupled together to receive a common mode reference voltage corresponding to the common mode input voltage of the CMOS comparator. The dummy comparator also includes a bias input and an output. The apparatus for generating a CMOS comparator bias voltage further includes a bias amplifier having a negative input coupled to the output of the dummy comparator, a positive input for receiving a threshold reference voltage corresponding to the input threshold of the next stage driven by the CMOS comparator, and an output coupled to the bias input of said dummy comparator to form a comparator bias voltage.
申请公布号 EP0375124(A1) 申请公布日期 1990.06.27
申请号 EP19890310737 申请日期 1989.10.18
申请人 TEKTRONIX, INC. 发明人 ETHERIDGE, ERIC PHARR
分类号 G05F3/24;H03F3/45 主分类号 G05F3/24
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