| 摘要 |
PURPOSE:To realize the high density of cells in a semiconductor memory device by forming a plurality of grooves on a memory cell array, and forming all constituents of a 1-transistor 1-capacitor type DRAM of vertical switching transistor using the sidewall of the groove, a storage electrode formed on the lower part of the groove, and a cell plate electrode, etc., in each groove. CONSTITUTION:A first cell plate electrode 12 is formed on the lower part of a groove 10, a storage electrode 14 is formed thereon through a capacitor insulating film 13, and a second cell plate electrode 16 is formed thereon through a capacitor insulating film 15. The storage electrode 14 is formed with a through hole 17 at the groove 10, and the first and second cell plate electrodes 12, 16 are electrically connected via the through hole 17. The source region 18 of a switching transistor is connected to the storage electrode 14, and the cell plate electrodes 12, 16 are connected to a substrate 11 at the lower part of the groove 10. With the structure, all the constituents of a 1-transistor 1-capacitor type DRAM are formed in the groove to enhance the density of a memory cell array. |
