| 摘要 |
<p>PURPOSE:To obtain a multistage injecting synchronous pulse amplifier with short injection synchronizing time by providing a timing correction circuit to correct the rise and fall timing of a pulse modulation gate which controls the on/off operation of a bias current. CONSTITUTION:Injecting synchronous pulse amplifiers 11-1n are cascade- connected in (n) stages, and bias circuits 21-2n supply bias currents D1-Dn to the injecting synchronous pulse amplifiers 11-1n. The timing correction circuits 31-3n correct the rise and fall timing of the pulse modulation gate which controls the on/off operation of the bias currents D1-Dn. Therefore, the rise timing of the bias current which drives the injecting synchronous pulse amplifier at the next stage can be delayed by the injection synchronizing time generated at the injecting synchronous pulse amplifier at each stage. In such a way, it is possible to suppress the injection synchronizing time at the output of the final stage to a minimum.</p> |
