A high-performance vertical PNP transistor compatible with an advanced ECL bipolar technology and method of manufacturing same.

摘要

The disclosure relates to a high performance vertical PNP transistor compatible with an advanced ECL bipolar technology and method of manufacturing same. Features of the disclosure are a high performance PNP transistor having an emitter (31) to extrinsic base (51) spacing of less than 0.5 micron and specifically as little as 0.3 micron. This is accomplished by providing a side wall oxide (41) on a doped contacting layer (23) whereby the contacting layer dopant diffuses into the epitaxial layer to form the emitter region (31). The extrinsic base region (51) is formed by placing a further doped contacting layer (47) of the epitaxial layer partly over the side wall oxide (41) whereby the dopant from the further doped contacting layer forms the extrinsic base region in the epitaxial layer and the side wall oxide (41) operates as a spacer to provide closer spacing between extrinsic base (51) and emitter (31) than can presently be obtained by photolithographic techniques.