发明名称 JUOINJIKANONAPURINTASOCHI
摘要 PURPOSE:To greatly reduce the hardware quantity, by using the common hardware to read the dot information out of a pattern memory in the case of both the vertical print and the horizontal print. CONSTITUTION:A counter group 3 includes a row address counter, a column address counter and a bit address counter that designates the bit position within a word. A counter control circuit 2 changes the longitudinal connection of the group 3 according to the vertical print or the horizontal print. An address converting circuit 4 produces a pattern memory reading address corresponding to the connection of the contents of the row and column address counters. Then a data selecting circuit 7 selects a bit out of the data read out of a pattern memory 6 based on the contents of the bit address counter.
申请公布号 JPH0228474(B2) 申请公布日期 1990.06.25
申请号 JP19800176231 申请日期 1980.12.13
申请人 PFU LTD 发明人 KADOMA TATSUO
分类号 B41J2/485;G06F17/21;G06K15/10;G09G5/24 主分类号 B41J2/485
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