发明名称 DIGITAL SIGNAL PROCESSING PROCESSOR
摘要 PURPOSE:To save useless operation to suppress required arithmetic quantity effectively and to make the processing time efficient by adopting the constitution such that a minimum distortion is compared with the result of calculated distortion for each cycle at the calculation of distortion between blocks and a number of a block giving the minimum distortion is stored. CONSTITUTION:The result of accumulation supplied from an output path 62 of an accumulator 7 via a branched output path 105 and an output data supplied from a minimum distortion register 10 via an output path 106 are compared for each cycle by a comparator 11. The accumulation is executed for a number of times provided in a repeat counter 9 and when the accumulation is finished normally, the write update of a value of an accumulation register 8 to a minimum distortion register 10, the write update of a value of a block counter 12 to a minimum distortion position register 13 and the control of the block counter 12 by an increment control signal are implemented.
申请公布号 JPH02162914(A) 申请公布日期 1990.06.22
申请号 JP19880318941 申请日期 1988.12.16
申请人 MITSUBISHI ELECTRIC CORP 发明人 MURAKAMI ATSUYORI;OHIRA HIDEO
分类号 G10L11/00;G06F17/10;G10L15/12;H03H17/00;H03H17/02 主分类号 G10L11/00
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