发明名称 HANDOTAISHUSEKIKAIRO
摘要 PURPOSE:To reduce the chip occupation area of an input protection circuit by a method wherein an input protection resistance element composed of polycrystalline Si other than a diffused layer resistor is formed under an electrode region for bonding, in an MIS type IC having a semiconductor element and a semiconductor protecting element which protects said element. CONSTITUTION:A polycrystalline Si resistor 42 is made to run under the electrode 41 for bonding, and a wiring electrode 43 serving as a gate is installed via contact 48, which electrode is then connected to an MIS transistor whose drain and source are diffused layers 44 and 46. It is further connected to a controller diode whose gate 45 is earthed via diffused resistor 44, and a lead wire 47 to an internal gate transistor input gate is provided. Now, when this structure is shown by a cross section, it is observed that the input protection resitor 52 composed of polycrystalline Si is provided between the semiconductor substrate 55 and an electrode 51 for bonding via field insulation film 56, a window is opened in the film 56, a diffused layer 54 is formed, thus composing an MIS transistor 53 together with the electrode 51.
申请公布号 JPH0228266(B2) 申请公布日期 1990.06.22
申请号 JP19830041663 申请日期 1983.03.14
申请人 NIPPON ELECTRIC CO 发明人 KOMATSU MICHIO
分类号 H01L27/04;H01L21/822;H01L23/60;H01L27/02;H01L27/06;H01L29/78 主分类号 H01L27/04
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