发明名称 INTERPOLATION ARITHMETIC CIRCUIT
摘要 PURPOSE:To prevent an error in interpolation by adding 1 to an interpolation value at specified intervals and at a frequency which corresponds to the size of data to be monitored by a correcting circuit. CONSTITUTION:Two successive data FD are inputted and the preceding data is subtracted from the trailing data at a part SUB to obtain their difference data, which is divided at a part SE by the number of sampling periods during one frame period. Then, the division result is added successively at a part AD1 to the precedent data at every sampling period to obtain an interpolation value successively. Then, data consisting of the low-order bit group of the difference data cut-off in the division is monitored by a correcting circuit CP, and ''1'' is added to the successively obtained interpolation value by the correcting circuit CP at specified intervals and at a frequency which corresponds to the size of said monitored data, thereby correcting an error in interpolation.
申请公布号 JPS5856181(A) 申请公布日期 1983.04.02
申请号 JP19810155524 申请日期 1981.09.30
申请人 FUJITSU KK 发明人 HASHIMOTO SHIYUUICHI;YASUI YUTAKA;TAKENO MINORU
分类号 G06F17/17;(IPC1-7):06F15/353 主分类号 G06F17/17
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