发明名称 INTEGRIERTE SCHALTUNGSANORDNUNG.
摘要 A semiconductor integrated circuit device having a fuse-blown type ROM for storing information concerning defective bits for the replacement of defective bits in a semiconductor memory device, etc., with redundant bits. The integrated circuit device comprises fuses for constituting the ROM, pads for supplying a melting current to the fuses, and PN junctions each being formed, for example, by a semiconductor substrate and a diffusion layer formed on the semiconductor substrate. Each of the fuses is melted by applying voltage to a circuit connecting the PN junction, the fuse, and the pad so that the PN junction is forward biased, thereby supplying a large current to the fuse.
申请公布号 DE3482294(D1) 申请公布日期 1990.06.21
申请号 DE19843482294 申请日期 1984.12.06
申请人 FUJITSU LTD., KAWASAKI, KANAGAWA, JP 发明人 TAKEMAE, YOSHIHIRO, TOKYO 107, JP;NAKANO, TOMIO, MIYAMAE-KU KAWASAKI-SHI KANAGAWA 213, JP;NAKANO, MASAO, KAWASAKI-SHI KANAGAWA 213, JP;SATO, KIMIAKI, TOKYO 104, JP
分类号 G11C17/14;G11C17/16;G11C29/00;H01L23/525;(IPC1-7):G11C17/00;G06F11/20;H01L23/52 主分类号 G11C17/14
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