DENRYOKUSENHANSOSHISUTEMUNOJUSHINKI

摘要

PURPOSE:To generate a clock synchronized with a zero-crossing similar to the normal time even at the power interruption time by resetting a counter with a logic sum output of the output of a rise detector and a power interruption signal. CONSTITUTION:A zero-corssing synchronous pulse generating circuit 21 is driven by an AC power source at the normal time and by a backup power source during a power interruption. A rise detector detects the rise of the zero-crossing outputted from a zero-crossing detector 14'. A counter 25 counts the internal clock of a period shorter than that of a zero-crossing pulse, the counted output is decoded by a decoder 26, which generates a polyphase clock and generates a power interruption signal SP in delay from the input timing of the zero-crossing pulse, the counter 25 is reset by the output of the logic sum 27 of the output of the detector 24 and the signal SP.