| 摘要 |
PURPOSE:To enable testing of an LSI circuit and reduction of a chip area of the LSI circuit to the minimum by integrating a test circuit on a chip separate from the one of the LSI circuit. CONSTITUTION:A test pattern generation instruction is supplied from an external tester 30 to a test circuit 20, a test pattern is developed in the circuit 20 on the basis of this instruction, and this pattern is supplied to an LSI circuit 10. An output of the circuit 10, which receives said pattern as an input and operates, is supplied to the circuit 20. In this circuit 20, said output is compared with an expected value set beforehand and the result of comparison is supplied to the tester 30. In this constitution, transmission of data between the circuits 10 and 20 is executed at a high speed, while transmission of data between the circuit 20 and the tester 30 is executed at a low speed. By generating a real test pattern is the circuit 20 according to a test instruction string, in other words, a high-speed test of the circuit 10 can be executed by the low-speed tester 30. |
