发明名称 |
VOLTAGE LEVEL SENSING POWER-UP RESET CIRCUIT |
摘要 |
A power-up reset circuit for providing a reset signal for resetting circuit elements such as filp-flops upon the application of power to the circuit includes a CMOS pair output section and a capacitor coupled to the gates of the CMOS transistors. The capacitor is charged up by the power supply to switch the reset signal to a low level after the resetting operation has been achieved. In order to accommodate slow ramping power supplies, circuitry operating as a voltage sensitive switch is included to prevent the capacitor from charging until the power supply voltage has reached a level to ensure proper operation.
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申请公布号 |
KR900004196(B1) |
申请公布日期 |
1990.06.18 |
申请号 |
KR19870002216 |
申请日期 |
1987.03.12 |
申请人 |
WESTERN DIGITAL CORP |
发明人 |
OUYANG KENNETH W;MARMET MELVIN |
分类号 |
H03K17/22;(IPC1-7):H03K17/28 |
主分类号 |
H03K17/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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