发明名称 Memory control device
摘要 The memory control device includes a request reception buffer memory 10, a request detection circuit 13, a circuit 20, 21, 22, 30 generating a read or write instruction, a main memory unit with an address register and a carry function, a carry instruction section, a response section 70-73, 74, 75, 76, 77, 79, 80, 81, a merging section 84 and a write section. This device makes it possible to provide for control of the main memory with less computer hardware than for current solutions. <IMAGE>
申请公布号 FR2640402(A1) 申请公布日期 1990.06.15
申请号 FR19890016187 申请日期 1989.12.07
申请人 NEC CORP 发明人 IKUO YAMADA
分类号 G06F12/04;G06F11/10;G06F13/18;(IPC1-7):G06F12/00 主分类号 G06F12/04
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