| 摘要 |
<p>PURPOSE:To convert a synchronizing digital data of plural channels into a single high speed data by using a serial/parallel converter and a parallel/serial converter. CONSTITUTION:To n-set of input digital lines synchronously with each other, n pcs. of serial/parallel converters 11-1n and n pcs. of serial parallel converters 21-2n are provided. Serial outputs SI-SO from parallel/serial converters 21, 22,..., 2n are connected sequentially serially, a data enable signal DE representing the end of conversion is outputted from a control circuit 3 at the end of parallel/ serial conversion when an enable signal EN representing the enable data transmission from a line is received, the parallel/serial converters 21, 22,..., 2n receive a high speed clock CLK 2 in parallel to shift the serial outputs SI-SO from the parallel/serial converters 21, 22,..., 2n one by one bit each at each clock and the result is sent as a serial data D from the output SO of the parallel/serial converters 21.</p> |
