发明名称 Method for analog/digital conversion by successive approximation with a very high sampling rate
摘要 Technical problem In analog/digital conversion in very fast transient recorders, clock times of about 10<-8> sec can be achieved by elaborate methods (flash ADC). The new method is simple and provides for shorter clock times. Solution of the problem The method of successive approximation can be used in the case of clock times of 10<-9> sec, as follows: conversion is carried out in a number of identical converter stages with controlled signal transit time which are connected in series with one another in a cascade and with low reaction. In each stage, the input signal is sampled and compensated in accordance with the weighting of the relevant stage. The converter stages process the input signal in pipe-line mode. An input signal with predetermined timing passes successively through the converter stages in the direction of decreasing weighting but input signals following one another in time are processed simultaneously in a number of converter stages. Field of application The method is suitable for constructing an analog/digital converter for transient recorders with a very high sampling rate in fast semiconductor technologies with a low level of integration (GaAs, ECL).
申请公布号 DE3841625(A1) 申请公布日期 1990.06.13
申请号 DE19883841625 申请日期 1988.12.10
申请人 TEUCHERT, DIETER, 2000 HAMBURG, DE 发明人 TEUCHERT, DIETER, 2000 HAMBURG, DE
分类号 H03M1/44 主分类号 H03M1/44
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