发明名称 Sidereal clock
摘要 The sidereal clock comprises a digital clock portion having a 60-Hz pulse source operating at line frequency of 60-Hz. It contains a means for periodically changing logic state at the 50/60-Hz select input of the prescale counter so that the digital clock portion is periodically changed during a period equal to 2922 clock pulses from the 60 Hz operation mode to the 50 Hz operation mode for a time interval equal to 40 clock pulses. During this time interval the prescale counter actually registers 6 counts for every 5 pulses received so that the digital clock portion runs fast by a factor of 2930/2922 and measures sidereal time. The means for changing logic state at the 50/60-Hz select input may comprise a ripple counter connected electrically to a plurality of gating circuits of first and second gating integrated circuits and a monostable multivibrator all of which are energized by the DC of the digital clock portion.
申请公布号 US4933920(A) 申请公布日期 1990.06.12
申请号 US19880286095 申请日期 1988.12.19
申请人 STERNBERG, IRWIN 发明人 STERNBERG, IRWIN
分类号 G04G3/02;G04G9/00 主分类号 G04G3/02
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