摘要 |
A vertical trench etched several microns deep into the silicon extending into a buried diffusion region is used to confine a vertical interconnect element. This element can be a high resistivity undoped polycrystalline silicon load resistor, a medium resistivity doped polycrystalline silicon load resistor, or a low resistivity interconnect to the buried diffusion region. This new structure can be used in compact and scalable MOS and bipolar inverters and in bistable memory storage cells.
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