| 摘要 |
<p>PURPOSE: To simultaneously monitor plural periods with a single counter circuit by comparing each counter circuit output with the time-out data word in each address and supplying a time-out signal in the case of coincidence. CONSTITUTION: The lower bit part of the output of a counter 30 is supplied to a register file 10, and the upper bit output is supplied to a file 10, a time-out word logic mechanism 20, and a comparison circuit 50. Information to designate a period to be counted is received by the mechanism 20. When receiving time-out data, the mechanism 20 generates a time-out word and loads it into the register file. The file 10 supplied a part of the data word to the comparison circuit 50 and supplies data to a timer output logic mechanism 60. 'The circuit 50 compares the upper bits of the output of the counter 30 with a part of the time-out data word and supplies a signal to the mechanism 60 in the case of coincidence. When the signal from the circuit 50 indicates the time-out state, the mechanism 60 decides which of time-out lines 61 to 64 should be activated.</p> |
