| 摘要 |
PURPOSE:To reduce a switching loss by setting the impurity concentration of an N<+> type buffer layer provided between an N<-> type layer having low impurity concentration and a P<+> type layer having a drain electrode to a specific value or more. CONSTITUTION:An N<-> type layer is formed on a P<+> type substrate 1, a P-well layer 3 is selectively formed on the surface layer of the layer 2, and an N<+> type source layer 4 is selectively formed on the surface layer of the layer 3. A gate electrode 7 is formed on a channel region 5 interposed between the layer 2 of the layer 3 and the layer 4 through a gate oxide film 6. Further, an N<+> type buffer layer 10 is formed between the layers 1 and 2 so that the total amount of impurity of the layer 10 is 1X10<14>(cm<-2>) or more. Thus, a switching loss can be reduced with a low ON resistance. |
