发明名称 Mfg. self-aligned gallium arsenide MESFET - involves forming T=shaped tungsten gate electrode
摘要 Mfr. of a self-aligned MESFET with a T-shaped tungsten gate electrode involves (a) applying a thin Si layer over the entire surface of a semi-insulating GaAs substrate by plasma-enhanced CVD, applying a Si3N4 layer by photo-CVD and ion implanting to produce an n-active layer using a photo-mask; (b) forming a gate electrode pattern by etching the Si3N4 layer using. the photo-mask; (c) selectively depositing tungsten by CVD only on the exposed Si layer and not on the Si3N4 layer; (d) thickening the tungsten in the transverse direction to form a T-shape; (e) forming an n+-layer by ion implantation using the T-shaped tungsten gate such that the gap between the gate electrode and the n+-layer is 1000-2000 Angstroms; (f) activating the n- and n+-layers using the Si layer and the Si3N4 layer as cover film; (g) ion implanting through the Si and Si3N4 layers to provide insulation between the devices; and (h) etching the Si and Si3N4 layers and applying an ohmic metallisation (AuGe/Ni) by a lift-off technique using a photo-mask to form a source and a drain. ADVANTAGE - The process minimises impurity problems caused by exposure of the GaAs layer to air and minimises mechanical damage during gate electrode application. Additionally, it avoids As evapn. during the high temp. activation process. The process is simple compared with the conventional SAINT process (self-aligned implantation of n+-layer technology).
申请公布号 DE3939635(A1) 申请公布日期 1990.06.07
申请号 DE19893939635 申请日期 1989.11.30
申请人 ELECTRONICS & ELECOMMU RES INST;KOREA TELECOMMUNICATION 发明人 PARK, HYUNG MOO;KIM, DONG GOO, DAEJEON, KR
分类号 H01L29/812;H01L21/285;H01L21/338;H01L29/417;H01L29/78 主分类号 H01L29/812
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