发明名称 |
Floating gate memory with sidewall tunnelling area |
摘要 |
The tunnelling area of a EEPROM memory device of the FLOTOX type is efficiently reduced in respect of the minimum areas obtained by means of current fabrication technologies, by forming the injection zone for the transfer of the electric charges by tunnel effect to an from the floating gate through an original self-aligned process, which allows to limit the dimensions of such a tunnelling area independently from the resolution limits of the available photolithographic technology.
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申请公布号 |
US4931847(A) |
申请公布日期 |
1990.06.05 |
申请号 |
US19890379706 |
申请日期 |
1989.07.14 |
申请人 |
SGS-THOMSON MICROELECTRONICS S.P.A. |
发明人 |
CORDA, GIUSEPPE |
分类号 |
H01L21/8247;H01L29/788;H01L29/792 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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