| 摘要 |
A D to A converter comprising a series of stages each including a current mirror having an input and an output transistor (Q1 and Q3) and a current adjusting transistor (Q2, Q4) connected in parallel with each input and output transistor for adjusting the output current from the current mirror as a function of the operating states of the current adjusting transistors. The operating state of each current adjusting transistor is controlled by a digital signal applied to a switch (Q2S, Q2S') connected to the gate of each current adjusting transistor. Each stage also includes a control circuit (Q1C, Q3C) for maintaining equal the drain voltages of its input and output transistors whereby the current changes introduced in the output current of the converter stage are functions of the relative geometric sizes of the input, output and current adjusting transistors comprising the converter stage.
|
