发明名称 Programmable analog voltage multiplier circuit means
摘要 An improved programmable analog voltage multiplier circuit means (PAVMCM) including various embodiments thereof that are operable in linear/nonlinear fashion. The PAVMCM is generally made up of multiplier circuit means, at least one switch means and at least one capacitor means. The switch means is connected to a programmable analog voltage (PAV) input and the capacitor means. The circuit means is composed of a high impedance analog voltage (HIAV) programming input, an analog voltage input and current source output means. The capacitor means is connected to the switch means and the HIAV programming input. The capacitor means receives and dynamically stores a PAV input when the switch is closed and then applies the dynamically stored PAV input to the HIAV programming input of the circuit means when the switch is opened. The product of the PAV input and the analog voltage input for a circuit means provides the multiplied current output of the output means thereof. Because of the high impedance of a FET gate means, it may be used where its gate means is the programming input of the PAVMCM means. PAVMCM means can be formed using FET multiplier and differential amplifier multiplier circuit means. The PAVMCM can be arranged to form embodiments of analog vector-vector and analog vector-matrix multiplier circuit means. One of the advantages of the PAVMCM when configured as a vector-matrix multiplier circuit means is that it is useful in an artificial neural network as well as for pattern recognition.
申请公布号 US4931674(A) 申请公布日期 1990.06.05
申请号 US19880271820 申请日期 1988.11.16
申请人 UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY 发明人 KUB, FRANCIS J.;MACK, INGHAM A.;MOON, KEITH K.
分类号 G06G7/163;G06J1/00;G06N3/063 主分类号 G06G7/163
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