| 摘要 |
PURPOSE:To enable an interleave system to be employed and to heighten the output throughput of the system by providing an output circuit to hold readout data from a random access memory, etc., until it is established and to send it to the outside. CONSTITUTION:The output circuit DOB which holds the readout data from the random access memories RAM0-RAM3, etc., to be set at operating states next until the readout data from the random access memories RAM0-RAM3 are established and sends them to the outside is provided at a memory unit, etc., including plural random access memories RAM0-RAM3 set at the operating states alternatively according to corresponding start-up selecting signals CS0-CS3. Therefore, output contention by the plural random access memories, etc., can be prevented occurring. In such a way, it is possible to shorten the cycle time of the memory unit to a time almost equivalent to data holding time, and to heighten the output throughput. |
