发明名称 |
CIRCUIT ARRANGEMENT CONVERTING DATA PACKET SEQUENCE INTO NORMAL MULTIPLEXING TYPE |
摘要 |
PURPOSE: To convert the sequence of a data packet into a normal multiplexing from by operating the reading of a describing unit for each packet according to a prescribed addressing rule so that delay generated in packet exchange can be minimized. CONSTITUTION: Information components from a slave station are received by a receiving part PR connected with an antenna A1 in different time slot periods. The output of the receiving part PR is connected with an aligning circuit arrangement AL controlled by a signal B1 from a time base BTP. The arrangement AL sorts the received information components according to an octet indicating packet start, regularly separates it by 32 time slots in a multiplexing form, and outputs it to a bus MXR. Signaling by each channel is operated in the time slot. The time base BTP controls a demultiplexer DM which extracts the signaling by each channel and a semaphore channel CS for a calculator C by a signal B2.
|
申请公布号 |
JPH02140026(A) |
申请公布日期 |
1990.05.29 |
申请号 |
JP19880317549 |
申请日期 |
1988.12.15 |
申请人 |
TELECOMMUN RADIOELECTR TELEPH <TRT> |
发明人 |
IBU ANRI MARUSERU RU GOFUI;ROORAN SUURABAYU |
分类号 |
H04J3/00;H04B7/26;H04L12/28 |
主分类号 |
H04J3/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|