发明名称 Tapering of holes through dielectric layers for forming contacts in integrated devices.
摘要 <p>Step coverage in contacts may be improved by forming a tapered hole through a dielectric layer by: a) plasma (RIE) etching through a "contact" mask the dielectric for a depth shorter than the thickness of the layer leaving a residual thickness of dielectric on the bottom of the etch; b) removing the residual masking material; c) conformally depositing a TEOS layer; d) etching the conformally deposited TEOS layer without a mask in (RIE) plasma until exposing the underlying silicon or polysilicon with which the contact must be established. The anisotropic etching of the TEOS layer, conformally deposited on the partially pre-etched dielectric layer, determines a "self-aligned" exposition of the underlying silicon or polysilicon and leaves a tapered TEOS residue on the vertical pre-etched hole's walls, thus providing a desired tapering of the contact hole. Photolithographic definition is no longer a critical factor. (Figures 1-4).</p>
申请公布号 EP0369953(A1) 申请公布日期 1990.05.23
申请号 EP19890830492 申请日期 1989.11.13
申请人 SGS-THOMSON MICROELECTRONICS S.R.L. 发明人 CROTTI, PIER LUIGI;IAZZI, NADIA
分类号 H01L21/3213;H01L21/311;H01L21/3205;H01L21/768 主分类号 H01L21/3213
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