| 摘要 |
<p>PURPOSE:To eliminate the malfunction of a storage circuit due to noise and to reduce power consumption by stopping a current supply from a high voltage switching circuit to a tentative storage circuit when a potential stored in the tentative storage circuit is lower than a prescribed value. CONSTITUTION:When an electron is discharged from a floating gate of a memory cell (not shown), the potential of a bit line BL goes to an H level at the load period and when a signal DL rises, a transistor (TR) T11 is conductive at the load period, a level '1' is stored in a latch section, the potential of a node A is charged to a Vcc and the potential of a node B is charged to Vcc-Vto. In this case, the gate potential of analog switches T22, 23 is respectively Vcc, Vss and the switch is turned on. In the erase period in this state, the node D is synchronized with the signal CLK in the erase period when the boosting clock signal CLK starts its operation, the HV-SW section is operated and a TR 18 is in cur state. In the reset period, the latch section and the HV-SW section are restored to the initial state.</p> |
