| 摘要 |
PURPOSE:To prevent a penetration current and assure high speed and balanced readout by more increasing threshold voltage of an enhancement type MIS transistor among MIS transistors constituting a memory cell than that of peripheral circuit MIS transistors. CONSTITUTION:The threshold voltage of enhancement type MOS transistors in memory cell arrays 1, 2 is made higher than that of a peripheral circuit enhancement type MOS transistors. Therefore, when the enhancement type MOS transistor is selected, the transistor is switched off in an early stage. Hereby, a penetration current can be restricted and readout can be made a high speed together with assurance of balanced readout by optimization of the threshold voltage. |
