发明名称 FORMATION OF WIRING IN MULTILAYER INTERCONNECTION BOARD
摘要 PURPOSE:To form an upper layer wiring without generating a cutting due to step differences in via hole parts by a method wherein, after an upper layer wiring part is covered with P-type and N-type resists, the P-type resist is exposed and developed to remove the P-type resist and a wiring conductor is formed. CONSTITUTION:A metal thin film 5 is formed on a substrate 4 with an insulating film 3, which is formed on the substrate 4 and has lower layer wiring conductors 1 and via holes 2, a P-type liquid photosensitive resist 6 is applied and dried on the film 5 and the resist 6 other than the resist 6, which is located on an upper layer wiring formation part, is removed. Then, an N-type liquid photosensitive resist 7 is applied and dried on the whole surface of the substrate and the resist 7 other than a part, which is located on the upper layer formation part, of the resist 7 is exposed and developed. Then, the resist 6 on the upper layer wiring formation part is exposed and developed. Then, an upper layer wiring conductor 6 is formed on the upper layer wiring formation part. As this result, the conductor 8 is formed without generating a cutting due to step differences. Then, the resist 7 is peeled and the exposed film 5 is removed.
申请公布号 JPH02128448(A) 申请公布日期 1990.05.16
申请号 JP19880282742 申请日期 1988.11.08
申请人 NEC CORP 发明人 OKADA YOSHITSUGU
分类号 H01L21/768;H01L21/027;H01L21/30;H05K3/46 主分类号 H01L21/768
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